julia

d5c76d6d - Replace hand-maintained CPU tables with cpufeatures library (#61292)

Replace hand-maintained CPU tables with cpufeatures library (#61292) ## Summary - Replaces `processor_x86.cpp`, `processor_arm.cpp`, `processor_fallback.cpp` (~5000 lines of hand-maintained CPU/feature tables) with a unified `processor_cpufeatures.cpp` that uses the [cpufeatures](https://github.com/gbaraldi/cpufeatures) library - CPU/feature data is extracted from LLVM's TableGen at build time and shipped as standalone C headers — no LLVM runtime dependency for the tables themselves - `cpuid.jl` now queries feature sets from the C library instead of hardcoding them - Debug output available via `JULIA_DEBUG=cpufeatures` ## What is cpufeatures? A standalone library that extracts CPU names, feature sets, and feature dependencies from LLVM's `MCSubtargetInfo` at build time into generated C headers. The generated headers are committed to the repo, so a normal build only needs a C++17 compiler — no LLVM required. Supports x86_64, aarch64, and riscv64. ## Changes **New files:** - `deps/cpufeatures.mk`, `deps/cpufeatures.version` — build system integration - `src/processor_cpufeatures.cpp` — unified processor implementation **Modified files:** - `src/processor.cpp` — includes new file instead of arch-specific ones - `src/processor.h` — feature enum → `uint32_t` typedef (indices from cpufeatures) - `src/Makefile` — updated dependencies, link `-ltarget_parsing` - `src/crc32c.c` — hardcode HWCAP bit instead of using removed enum - `base/cpuid.jl` — ISA sets from C queries, not hardcoded - `base/Makefile` — `features_h.jl` from cpufeatures headers - `deps/Makefile` — add cpufeatures to `DEP_LIBS` **Files to delete (follow-up):** - `src/processor_x86.cpp`, `src/processor_arm.cpp`, `src/processor_fallback.cpp` - `src/features_x86.h`, `src/features_aarch32.h`, `src/features_aarch64.h` ## Test plan - [x] `make clean && make -j` succeeds (downloads, builds, links cpufeatures) - [x] CPU detection: correct name and features on znver4 - [x] Multiversioned sysimage (`generic;haswell;skylake-avx512`): correct target selection - [x] `-C haswell` selects haswell target, `-C generic` selects generic - [x] CPU name aliases (skx, corei7, atom, etc.) resolve correctly - [x] `BinaryPlatforms` ISA matching works - [x] FMA, sin, sqrt, basic math all work - [x] `JULIA_DEBUG=cpufeatures` shows target selection details ## Related - cpufeatures library: https://github.com/gbaraldi/cpufeatures - Prior art: #60460 (archspec approach) 🤖 Generated with [Claude Code](https://claude.com/claude-code) --------- Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com> Co-authored-by: Christian Guinard <28689358+christiangnrd@users.noreply.github.com>