DeepSpeed
fa1ca15d - XPU: register native pinned host memory with the SYCL runtime

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73 days ago
XPU: register native pinned host memory with the SYCL runtime Native pinned buffers (DS_PIN_MEMORY_BACKEND=native) were mlock-only on XPU because XPU_Accelerator inherited the no-op register_host_memory hooks, so H2D/D2H stayed at pageable bandwidth. Implement the hooks via SYCL's prepare_for_device_copy/release_from_device_copy and make the pin_memory benchmark accelerator-agnostic so the gain can be measured on Intel GPUs. Signed-off-by: Ma, Guokai <guokai.ma@intel.com>
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