CUDA: split the PAD_REFLECT_1D grid to stay within the HIP grid limit
The kernel launches one block per row and 256-wide tile, so the
{2, 16777217} test case asks for 16777217 blocks of 256 threads. HIP
refuses a grid dimension above 2^32 threads and the ROCm jobs fail
with "invalid configuration argument".
The host now launches the grid in chunks of at most UINT32_MAX / 256
blocks and passes the chunk offset to the kernel. Real sizes fit in a
single chunk and keep their timings.
llama.cpp
ff0e760c - CUDA: split the PAD_REFLECT_1D grid to stay within the HIP grid limit
