Add HunYuan VL model (#46417)
* Add HunyuanVL model, processor, and tests
* Polish HunyuanVL for upstream readiness
- Rewrite modular_hunyuan_vl.py to inherit from HunYuanDenseV1 and Llama base
modules instead of re-implementing them, drop the staticmethod helpers from
HunYuanVLPreTrainedModel and use module-level helpers, and switch attention
forward to the standard ALL_ATTENTION_FUNCTIONS.get_interface dispatch.
- Restore _init_weights via inheritance from HunYuanDenseV1PreTrainedModel so
RoPE inv_freq buffers are correctly re-derived during from_pretrained.
- Convert HunYuanVLVisionConfig and HunYuanVLTextConfig to dataclass-only
declarations with __post_init__ legacy-alias normalization, remove the
spurious legacy MoE fields from the public config surface, and switch to
PreTrainedConfig (camel-case) consistently.
- Simplify HunYuanVLConfig composition to mirror Qwen2.5-VL while preserving
flat-checkpoint compatibility via _extract_text_kwargs so the published
tencent/HunyuanOCR weights still load correctly.
- Move xdrope helpers to module-level functions and document the 4-channel
position-id layout in the processor.
- Add license header and module docstring to processing_hunyuan_vl.py, make
the slow image processor expose default size as a class attribute, drop the
utf-8 declaration in the fast processor, migrate Optional/Union annotations
to PEP 604, and clean up auxiliary imports.
- Replace the fake meta-hunyuan_vl checkpoint examples in docstrings with
tencent/HunyuanOCR usage.
- Refresh tests to use upstream-style minimal helpers, drop dependencies on
the obsolete top-level kwarg routing, and add coverage for HunYuanVLConfig
dict round-trip and the new config layout.
* update the docstring of hunyuanvl and add the __post_init__() in HunyuanVLConfig
* fix some CI bugs and add PIL image processing
* update
* update
* update
* Polish modular HunYuanVL integration
Update HunYuanVL to address review feedback across the main integration surfaces: config compatibility, VLM model/API structure, image processor and processor behavior, checkpoint weight conversion, documentation, and focused tests.
Regenerate the derived HunYuanVL files so the standalone implementation stays in sync with the modular source.
* update
* update
* update hunyuan_vl.md and refactor the xdrope section to mrope section
* update
* update
* update
* update
* fix repo and processor tests
* model tests
* style
* run check repo
* fix one slow test expectation with runners
* diff from Mana
* make style
* update upper bound in test
---------
Co-authored-by: manayang <manayang@tencent.com>
Co-authored-by: jiazhimi <jiazhimi@tencent.com>
Co-authored-by: raushan <raushan@huggingface.co>
Co-authored-by: vasqu <antonprogamer@gmail.com>
