llvm
08c81d3c - [SYCL] Fix bindless image sample instruction generation (#21345)

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15 days ago
[SYCL] Fix bindless image sample instruction generation (#21345) The SPIR-V specification requires the result type of the `OpImageSampleExplicitLod` instruction to be a vector of four components. The SYCL bindless images extension allows the user to specify a return type for the `sample_image` call that may not be a vector. This commit ensures the SYCL headers correctly convert between the user-specified type and the type required by the SPIR-V specification to prevent generating invalid SPIR-V modules. --------- Signed-off-by: Michael Aziz <michael.aziz@intel.com>
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