llvm

4a905ca3 - [SYCL] Cherry-pick fixes for UR L0 v1 adapter memory leaks (#20253)

[SYCL] Cherry-pick fixes for UR L0 v1 adapter memory leaks (#20253) This is a joint cherry-pick of intel/llvm#18325 and intel/llvm#19827 --- [UR][L0] Event pool cache leak fix (https://github.com/intel/llvm/pull/18325) addresses event pool leak when SYCL_PI_LEVEL_ZERO_DISABLE_EVENTS_CACHING is set to 1 --- [UR][L0] Event cleanup in urEnqueueKernelLaunch (https://github.com/intel/llvm/pull/19827) When using internal events we do not clean up after execution. In the case of repeated call to urEnqueueKernelLaunch we eventually return UR_RESULT_ERROR_OUT_OF_RESOURCES. --------- Patch-by: Zhang, Winston <winston.zhang@intel.com>