llvm

7b9001e1 - [SYCL][FPGA] Implement task_sequence header, properties, and add new fpga_cluster kernel property (#12453)

[SYCL][FPGA] Implement task_sequence header, properties, and add new fpga_cluster kernel property (#12453) Implement task_sequence header, task_sequence properties, and fpga_cluster kernel property according to the spec updates https://github.com/intel/llvm/pull/6348 (almost ready to be merged) Header - Refactor invocation and response capacity to be on the Create intrinsic, so Async and Get do not take in respective argument - Remove max_outstanding argument of Create intrinsic - Add pipelined and fpga_cluster arguments to Create intrinsic - Async, Get, and Release intrinsic now accept the TargetExtType target("spirv.TaskSequenceINTEL") returned from the Create intrinsic, and do not take in object pointer or task function pointer arguments - Task Sequence accepts properties Task Sequence Properties - Convert invocation and response capacity from template parameters to properties - Add balanced property to remove Get intrinsic loop in destructor FPGA Kernel properties - Add fpga_cluster property - Support fpga_cluster and pipelined property for task sequence