[SYCL] Implement sycl_ext_intel_maximum_registers (#22923)
This PR implements
[sycl_ext_intel_maximum_registers](https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/proposed/sycl_ext_intel_maximum_registers.asciidoc)
which allows per-kernel GRF size specification, communicated to the
graphics driver using the
[SPV_INTEL_maximum_registers](https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_maximum_registers.asciidoc)
SPIR-V extension.
The SYCL extension defines two new properties, `maximum_registers<N>`
and `maximum_registers_automatic`.
There is a similar extension
[sycl_ext_intel_grf_size](https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/experimental/sycl_ext_intel_grf_size.asciidoc),
however the mechanism by which that extension communicates the user
specification to the graphics driver is not supported in some use cases,
does not use a first-class SPIR-V extension.
The new extension covers all use cases, but it requires a graphics
driver supporting
[SPV_INTEL_maximum_registers](https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_maximum_registers.asciidoc)
and using it will error on drivers that do not support the new
extension, so we introduced a new extension to not break existing users
of
[sycl_ext_intel_grf_size](https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/experimental/sycl_ext_intel_grf_size.asciidoc)
and allow users to opt-in to the requirement to have a driver supporting
this extension.
The property ends up after CFE codegen as the IR attribute
`sycl-maximum-registers` which `CompileTimePropertiesPass` processes by
adding the `MaximumRegisters` metadata to the kernel, which the SPIR-V
translator is looking for.
SPIR-V translator support was implemented in
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/commit/ca3769b7071f875408ebef197bbc1edabc414248.
There is no public driver implementing
[SPV_INTEL_maximum_registers](https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_maximum_registers.asciidoc)
yet, so I wrote a compile-time test to verify the property mutual
exclusivity/supported register sizes, and a currently-build-only E2E
test to make sure all cases at least compile. Once a driver is available
and we are using it in CI, the test will XPASS so we can enable it.
I manually tested this on Linux BMG using a prototype graphics driver
and everything worked as expected. I will test on Windows when a final
implementation is merged, the prototype didn't support Windows.
---------
Signed-off-by: Nick Sarnie <nick.sarnie@intel.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
