[SYCL][Doc] Add initial draft of the device registry (#18822)
This PR adds a registry containing enumerator values of device targets,
features and architectures to be used with the
[SPV_INTEL_function_variants](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_function_variants.asciidoc)
extension (and other extensions that find it useful). See the README
file for details.
The purpose of the PR is to iterate on the registry format before
filling in all the entries.
Targets and features come from inspecting compiler output (`llc
--version` and `llc --mtriple=<target> -mattr=help`). A bulk of the
architectures I took directly from
[sycl_ext_oneapi_device_architecture](https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/experimental/sycl_ext_oneapi_device_architecture.asciidoc)
(mostly the GPUs). Others I added by hand (eg. Intel and ARM CPUs).
## Open questions:
* There could be other ways how to categorize the Intel CPU
architectures. I opted strictly for the microarchitecture, another
possibility is by the processor name / codename (eg. Meteor Lake instead
of Redwood Cove + Crestmont). This may apply for other architectures as
well.
* Should we add only Intel architectures and let other vendors fill
their own? For adoption, it would be better to add as many as we can,
but we risk landing on architecture ordering different from what the
vendor would prefer.
* During version 0 we can pre-add values for other vendors and let
vendors take over before "freezing" version 1.
