[llvm-exegesis][X86] Groups ports 2,3, and 11 for Golden Cove (#115645)
This patch updates the PFM counter mappings for Sapphire Rapids and
Alder Lake (p-cores) to group ports 2,3, and 11 despite the naming of
the performance counters. This is how the scheduling models assume
things work within LLVM, and seems to be a mistake within the Intel
perfmon documentation.
Fixes #113941.