llvm-project
16cef47f - [mlir][acc] Capture explicit serial semantics for compute regions (#195158)

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4 days ago
[mlir][acc] Capture explicit serial semantics for compute regions (#195158) This PR improves robustness in capturing when user's intent is to treat OpenACC region as sequential. It does so in the following ways: - Ensure that `seq` acc.par_width is explicitly used when region is serial. Previously it was not assigning any acc.par_width which causes ambiguities because that way it is indistinguishable whether a region is explicitly serial vs whether the region needs implicitly assigned parallelism. - Treas `acc parallel` and `acc kernels` with `num_gangs(1)` `num_workers(1)` `vector_length(1)` exactly the same as `acc serial`. This is because these are all parallelism dimensions expressible with OpenACC clauses and being all set to 1 makes the semantics consistent with those defined for `acc serial`.
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