llvm-project

1eae7ef7 - [AMDGPU] Update f8f6f4-wmma hazard tests regarding matrix format, NFC (#204037)

[AMDGPU] Update f8f6f4-wmma hazard tests regarding matrix format, NFC (#204037) Need to map the matrix format suffix to the register size correctly in the MIR tests. For example, 'F4' format needs v8i32 register class.