llvm-project

1fe27df5 - [RISCV][llvm] Support mul codegen for P extension (#174793)

[RISCV][llvm] Support mul codegen for P extension (#174793) P extension doesn't have native support of mul low instruction which aligns llvm's mul operation semantic. We use vnsrl(pwmul(a, b), 0) in rv32 to emulate mul low and ppaire(pmul_b00(a, b), pmul_b11(a, b)) since pwmul and pnsrl is only available in rv32.