llvm-project

28269245 - [CIR][AArch64] Add support for the remaining `vceqz` builtins (#185440)

[CIR][AArch64] Add support for the remaining `vceqz` builtins (#185440) Implement the remaining CIR lowerings for the AdvSIMD (Neon) `vceqz` intrinsic group (bitwise equal to zero). Most variants of `vceqz` variant were already supported; this patch completes the rest of the group [1] that was left as a TODO. Tests for these intrinsics are moved from: * test/CodeGen/AArch64/neon_intrinsics.c * test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c to: * test/CodeGen/AArch64/neon/intrinsics.c * test/CodeGen/AArch64/neon/fullfp16, respectively. The implementation largely mirrors the existing lowering in CodeGen/TargetBuiltins/ARM.cpp. Reference: [1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#bitwise-equal-to-zero