llvm-project

2ec13c51 - [AArch64][SVE] Add patterns for bit-select instructions. (#138689)

[AArch64][SVE] Add patterns for bit-select instructions. (#138689) This patch adds patterns to select SVE2 bit-sel instructions such as BSL from (or (and a, c), (and b, (vnot c)))) and other similar patterns. For example: ```cpp svuint64_t bsl(svuint64_t a, svuint64_t b, svuint64_t c) { return (a & c) | (b & ~c); } ``` Currently: ```gas bsl: and z0.d, z2.d, z0.d bic z1.d, z1.d, z2.d orr z0.d, z0.d, z1.d ret ``` Becomes: ```gas bsl: bsl z0.d, z0.d, z1.d, z2.d ret ```