llvm-project

337bad39 - [EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (#133554)

[EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (#133554) Bug relates to `early-if-predicator` and `early-ifcvt` passes. If virtual register has "killed" flag in both basic blocks to be merged into head, both instructions in head basic block will have "killed" flag for this register. It makes MIR incorrect. Example: ``` bb.0: ; if ... %0:intregs = COPY $r0 J2_jumpf %2, %bb.2, implicit-def dead $pc J2_jump %bb.1, implicit-def dead $pc bb.1: ; if.then ... S4_storeiri_io killed %0, 0, 1 J2_jump %bb.3, implicit-def dead $pc bb.2: ; if.else ... S4_storeiri_io killed %0, 0, 1 J2_jump %bb.3, implicit-def dead $pc ``` After early-if-predicator will become: ``` bb.0: %0:intregs = COPY $r0 S4_storeirif_io %1, killed %0, 0, 1 S4_storeirit_io %1, killed %0, 0, 1 ``` Having `killed` flag set twice in bb.0 for `%0` is an incorrect MIR.