llvm-project

36e26fef - TableGen: Index defs by direct superclass for getAllDerivedDefinitions (#234952)

TableGen: Index defs by direct superclass for getAllDerivedDefinitions (#234952) getAllDerivedDefinitions visited every def to find those derived from the requested class. The results are cached per class, but adding a def clears the cache, so each !instances during parsing scans again. Generating the RISC-V DAG instruction selector scans all 260,000 defs 26 times. Record each def under its direct superclasses when it is added, and have a query test those superclasses instead of every def. A def with several matching superclasses is found more than once, so remove the duplicates after sorting. RISCVGenDAGISel.inc tablegen run: Gigainstructions Gigacycles CPU seconds Before 61.4 33.8 10.5 After 60.9 (-0.8%) 31.7 (-6.0%) 9.9 (-5.8%) AMDGPUGenDAGISel.inc tablegen run: Gigainstructions Gigacycles CPU seconds Before 119.0 66.7 20.4 After 118.7 (-0.3%) 65.1 (-2.5%) 19.9 (-2.3%) All 366 tablegen runs in an LLVM build with all targets: Gigainstructions Gigacycles CPU seconds Before 2262 1389 454 After 2235 (-1.2%) 1304 (-6.1%) 428 (-5.8%) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>