llvm-project
39c6ed3d - [CIR][AArch64] add vshr_* builtins (#186693)

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12 days ago
[CIR][AArch64] add vshr_* builtins (#186693) Part of https://github.com/llvm/llvm-project/issues/185382 - Moved lowering logic from clangir incubator to upstream - Added tests, partially reusing tests from [neon-intrinsics.c](https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/AArch64/neon-intrinsics.c) and [neon.c](https://github.com/llvm/clangir/blob/main/clang/test/CIR/CodeGen/AArch64/neon.c) - Made sure that all intrinsics from [Neon ACLE](https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-right) are implemented and tested
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