llvm-project

450737fb - [TargetInstrInfo] Add target hook for InstrSchedModel latency. [NFCI]

[TargetInstrInfo] Add target hook for InstrSchedModel latency. [NFCI] These hooks already exist when using instruction itineraries for latency info, this patch adds them for the newer TargetSchedModel. Allows targets to dynamically set latency values in the DAG builder. This is useful in multi-pass schedulers like in the AMDGUP backend where we may want to schedule a region multiple times with a different machine model or tweaked latencies for a specific instruction type.