llvm-project

4661c024 - [AMDGPU] Waterfall loop codegen improvement in SIInstrInfo (#192415)

[AMDGPU] Waterfall loop codegen improvement in SIInstrInfo (#192415) When generating waterfall loops, use the instructions `v_cmpx_eq_*` and `s_andn2_wrexec_*` as recommended for recent architectures, instead of `v_cmp_eq_*` and `s_and saveexec`. This PR only updates waterfall loop code generation in `SIInstrInfo.cpp`. Other places that generated waterfall loops can be handled separately. - Add new lane mask constant for `s_andn2_wrexec` - Set `isTerminator` for `v_cmpx_eq_{u32,u64}_e32` - Fix test `mubuf-legalize-operands.mir` to track liveness needed for verifying phi nodes - Update .ll and .mir tests to accept the new instruction sequences Assisted-by: Claude