llvm-project

4c97c513 - [RISCV] Add ISel patterns for Xqcilia instructions (#135724)

[RISCV] Add ISel patterns for Xqcilia instructions (#135724) This patch adds instruction selection patterns for generating the long immediate arithmetic instructions. We prefer generating instructions that have a 26 bit immediate to a 32 bit immediate given that both are of the same size but the former might be easier to register allocate for. Base RISC-V arithmetic instructions will be preferred, when applicable.