llvm-project

4f32e473 - [AArch64] Parameterize repeated FP divisor combine threshold by subtarget (#216930)

[AArch64] Parameterize repeated FP divisor combine threshold by subtarget (#216930) Changes: This patch makes the threshold for combining repeated FP divisors configurable per AArch64 subtarget, instead of using a single fixed value 3 for all CPUs. Additionaly, set this value 2 for A64FX based on observed profitability for this transform on A64FX. Motivation: Today, AArch64 uses a fixed threshold of 3 for reciprocal transform. This means the transform runs when there are 3 FDIVs with the same divisor (not 2). That is conservative for some subtargets, and it can miss profitable opportunities on CPUs such as A64FX, where a lower threshold appears to produce better code generation. ``` a / D; b / D; ... => recip = 1.0 / D; a * recip; b * recip; ... ``` Note: It does not change the semantics of the reciprocal transform itself.