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50e345ef - [AArch64] Use correct regclass for spills of ZPR2/ZPR4 (#148806)

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156 days ago
[AArch64] Use correct regclass for spills of ZPR2/ZPR4 (#148806) Commit a6293228fdd5aba8c04c63f02f3d017443feb3f2 forced the register class of ZPR[24]StridedOrContiguous for spills/fills of ZPR2 and ZPR4, but this may result in issues when the regclass for the fill is a ZPR2/ZPR4 which would allow the register allocator to pick `z1_z2`, which is not a supported register for ZPR2StridedOrContiguous that only supports tuples of the form (strided) `z0_z8`, `z1_z9` or (contiguous, start at multiple of 2) `z0_z1`, `z2_z3`. For spills we could add a new register class that supports any of the tuple forms, but I've decided to use two pseudos similar to the fills for consistency. Fixes https://github.com/llvm/llvm-project/issues/148655
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