llvm-project

5ac616f3 - [AArch64] Improve lowering of GPR zeroing in copyPhysReg (#163059)

[AArch64] Improve lowering of GPR zeroing in copyPhysReg (#163059) This patch pivots GPR32 and GPR64 zeroing into distinct branches to simplify the code an improve the lowering. Zeroing GPR moves are now handled differently than non-zeroing ones. Zero source registers WZR and XZR do not require register annotations of undef, implicit and kill. The non-zeroing source now cannot process WZR removing the ternary expression. This patch also moves GPR64 logic right after GPR32 for better organization.