[clang-format] Handle Verilog dist (#224794)
This patch adds the space on the left of the `:=` operator. It is the
style used in the spec. Previously there was only one on the right.
old
```SystemVerilog
x dist {[100 : 102]:= 1, 200:= 2, 300:= 5};
```
new
```SystemVerilog
x dist {[100 : 102] := 1, 200 := 2, 300 := 5};
```
