llvm-project

634b0243 - [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (#83116)

[llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (#83116) T1 allows for an optional registers list, the register list must be {d0-d15}. T2 defines a mandatory register list, the register list must be {d0-d31}. The requirements for T1/T2 are as follows: T1 T2 Require: v8-M.Main, v8.1-M.Main, secure state secure state 16 D Regs valid valid 32 D Regs UNDEFINED valid No D Regs NOP NOP