llvm-project

65d67f5b - [X86] Fix wrong ImmT in several instructions and add assertion (#185461)

[X86] Fix wrong ImmT in several instructions and add assertion (#185461) Follow-up to #185254: Several instructions inherited ImmT=Imm8 from *Ii8Base/*Ii8 classes without having an actual immediate operand. This made X86MCCodeEmitter::emitMemModRMByte compute ImmSize=1 instead of 0: ``` int ImmSize = !Disp.isImm() && X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0; ``` biasing RIP-relative displacements by one byte (e.g. foo-0x5 instead of foo-0x4). Affected instructions: - VCVTHF82PH (via AVX512XDIi8Base): has memory forms, wrong relocations - V[U]COMIS{S,D,H}Zrrb (via AVX512P{S,D}Ii8Base): reg-only, latent - MMX_MOV{DQ2Q,Q2DQ}rr and variants (via MMXSDIi8/MMXS2SIi8): reg-only, latent Fix by replacing the *Ii8Base/*Ii8 classes with their prefix-only equivalents (TB, XD, XS, PD) and setting ExeDomain explicitly where needed. Add an assertion in encodeInstruction to catch future TSFlags/operand ImmType mismatches: after consuming all operands in the Form-specific switch, if `hasImm(TSFlags)` is true but `RemainingOps` is 0 and the Form isn't one that handles immediates internally (RawFrm, AddCCFrm, RawFrmImm8, RawFrmImm16, RawFrmMemOffs), the assertion fires. For example, `VCOMISDZrrb` has `Form=MRMSrcReg` and `ImmT=Imm8` (from AVX512PDIi8Base), but after consuming both XMM operands CurOp equals NumOps, leaving RemainingOps=0 with no immediate to emit.