llvm-project

689ecf88 - [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (#181360)

[Hexagon] Handle subreg copies between DoubleRegs and IntRegs (#181360) ISel can generate truncating COPYs from DoubleRegs to IntRegs when a 64-bit result (e.g., C2_mask) is used in a 32-bit context. Several passes crashed on this pattern: BitTracker asserted WD >= WS for COPY instructions. Handle the WD < WS case by extracting the low WD bits from the source. HexagonInstrInfo::copyPhysReg had no case for IntRegs <- DoubleRegs or DoubleRegs <- IntRegs. Add both directions, respecting the subreg index on the operand (isub_lo/isub_hi) when present. HexagonTfrCleanup asserted that source and destination register sizes match. Replace with proper subreg resolution on both operands and a hasNoVRegs() guard since the pass runs post-RA. HexagonGenMux asserted no subregs on physical register operands. Preserve subreg information when building mux instructions and resolve subregs when fixing kill flags. Co-authored-by: Sergei Larin <slarin@codeaurora.org> --------- Co-authored-by: Sergei Larin <slarin@codeaurora.org>