llvm-project

71b066e3 - [RISCV] Add CodeGen support for qc.insbi and qc.insb insert instructions (#152447)

[RISCV] Add CodeGen support for qc.insbi and qc.insb insert instructions (#152447) This patch adds CodeGen support for qc.insbi and qc.insb instructions defined in the Qualcomm uC Xqcibm extension. qc.insbi and qc.insb inserts bits into destination register from immediate and register operand respectively. A sequence of `xor`, `and` & `xor` depending on appropriate conditions are converted to `qc.insbi` or `qc.insb` which depends on the immediate's value.