llvm-project
74275a11 - [RISCV] Simplify code gen for riscv_vector_builtin_cg.inc [NFC] (#156397)

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232 days ago
[RISCV] Simplify code gen for riscv_vector_builtin_cg.inc [NFC] (#156397) For each intrinsic with ManualCodegen block will generate something like below: ```cpp SegInstSEW = 0; ... if (SegInstSEW == (unsigned)-1) { auto PointeeType = E->getArg(4294967295)->getType()->getPointeeType(); SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType)); } ``` But actually SegInstSEW is table-gen-time constant, so can remove that if-check and directly use the constant. This change reduce riscv_vector_builtin_cg.inc around 6600 lines (30913 to 24305) which is around 20% reduction, however seems this isn't impact the build time much since the redundant dead branch is almost will optimized away by compiler in early stage.
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