llvm-project

754e4ba2 - [AArch64][llvm] Reject assembler for invalid TLBIP instructions

[AArch64][llvm] Reject assembler for invalid TLBIP instructions Some invalid assembler is currently allowed for `tlbip` sys alias instructions, since there's only a single table in tablegen for both `tlbi` and `tlbip` instructions. However, the latter is only a subset of the former, so invalid machine code is generated for `tlbip` instructions which don't actually exist. Define a `TLBI_and_TLBIP` and `TLBI_only` enum (wish tablegen had first class enum support), so that only valid `tlbip` instructions are created in the `TLBIPEntry` table, and instructions which are not valid are correctly rejected. Add new testcases for this. (See the Arm ARM DDI 0487 L.b pages C5-802 to 809 where valid `tlbi` and `tlbip` instructions are defined). For example, before this change, both of the following are accepted. Subsequent to this change, `tlbip` is correctly rejected: ``` % llvm-mc -triple=aarch64 <<< "tlbi alle1" --show-encoding tlbi alle1 // encoding: [0x9f,0x87,0x0c,0xd5] % llvm-mc -triple=aarch64 -mattr=+d128 <<< "tlbip alle1, x0, x1" <stdin>:1:7: error: invalid operand for TLBIP instruction tlbip alle1 ^ ```