llvm-project

7ced3281 - [RISCV] Use ri.vunzip2{a,b} for e64 fixed length deinterleave(2) shuffles (#137217)

[RISCV] Use ri.vunzip2{a,b} for e64 fixed length deinterleave(2) shuffles (#137217) If we have xrivosvizip, we can use the vunzip2{a,b} instructions for these cases *provided* that we can prove the layout in the two registers matches the fixed length semantics. The majority of this patch is a straight-forward port of the existing vnsrl logic which has the same requirement (though for slightly different reasoning). The one complicated bit is the addition of the scalable splitting logic inside lowerVZIP to exploit the independent register operands, and allow the use of lower LMUL. This bit is annoyingly complicated, and really "should" be a DAG combine - except that the VL and mask reduction becomes hard when it's not known to be a constant.