[AMDGPU] Skip vector atomicrmw operands in AtomicOptimizer (#223309)
A uniform `<2 x i32>` `atomicrmw add` reaches a scalar-to-vector
lane-count cast and asserts in AMDGPUAtomicOptimizer.
The divergent-value path rejects types in `isLegalCrossLaneType`,
but the uniform-value path does not.
Returned vectors also enter scalar result construction.
Reject vector types in `visitAtomicRMWInst` and `visitIntrinsicInst`
before either value path. The regression covers unused
global `add`, returned LDS `and`,
and a uniform scalar `i16` control that must still optimize, using DPP
and iterative strategies on wave64 and wave32 subtargets.