llvm-project

7f3d91d1 - [RISCV][MCA] Avoid deriving EMUL without SEW (#207986)

[RISCV][MCA] Avoid deriving EMUL without SEW (#207986) When only an LMUL instrument is active, SEW is unavailable. Avoid deriving EMUL for vector memory instructions in that case and fall back to the base scheduling class. Closes #170118.