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- [LLVM][CodeGen][SVE] Lower to multivector loads instead of splitting them. (#150421)
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12 days ago
[LLVM][CodeGen][SVE] Lower to multivector loads instead of splitting them. (#150421) NOTE: Transformation requires subreg liveness because otherwise register allocation can introduce unnecessary copies.
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#150421 - [LLVM][CodeGen][SVE] Lower to multivector loads instead of splitting them.
Author
paulwalker-arm
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393d3e40
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