llvm-project

8a64dccb - [CIR][AArch64] Add lowering + tests for predicated SVE svdup_x builtins (#182542)

[CIR][AArch64] Add lowering + tests for predicated SVE svdup_x builtins (#182542) This PR adds CIR lowering + tests for the predicated SVE `svdup` builtins on AArch64. The corresponding ACLE intrinsics are documented at: https://developer.arm.com/architectures/instruction-sets/intrinsics This PR covers the merging-predicated variants with suffix `_x`, e.g. `svdup_n_f32_x`. The corresponding LLVM intrinsics take an undef which are merged into the result for lanes where the predicate is false.