llvm-project

8dd73767 - [RISCV][P-ext] Support 4i16/v8i8 MULHS/MULHU/MULHSU for division by constant (#201747)

[RISCV][P-ext] Support 4i16/v8i8 MULHS/MULHU/MULHSU for division by constant (#201747) Update the mulhs+add->mulhsu combine to create a split mulhsu for 64-bit types. LegalizeVectorOps will ignore target specific opcodes so we can't custom lower it later.