llvm-project

962c4217 - [MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506)

[MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506) This change only applies to functions the can be reasonably expected to use SVE registers. Modifying vector length in the middle of a function might cause incorrect stack deallocation if there are callee-saved SVE registers or incorrect access to SVE stack slots. Addresses (non-issue) https://github.com/llvm/llvm-project/issues/143670