llvm-project

991d7540 - [RISCV] Implement base scheduling model for andes 45 series processor. (#141008)

[RISCV] Implement base scheduling model for andes 45 series processor. (#141008) This patch implements scheduling model for IMAFD and Zb extension. The latency and throughput of all instructions, except load/store, are measured by llvm-exegesis. Scheduling model for V and other extensions will be added in a follow-up patch.