llvm-project

a029ece7 - [RISCV] Fix coalescing vsetvlis when AVL and vl registers are the same (#141941)

[RISCV] Fix coalescing vsetvlis when AVL and vl registers are the same (#141941) With EVL tail folding we can end up with vsetvlis where the output vl and the input AVL are the same register. When we try to coalesce it we crashed because we tried to move the def's live interval before the kill's live interval, e.g. in this example: (vn0 def) dead $x0 = PseudoVSETIVLI 1, 192, implicit-def $vl, implicit-def $vtype renamable $v9 = COPY killed renamable $v8 (vn1 def) %23:gprnox0 = PseudoVSETVLI killed (vn0) %23:gprnox0, 197, implicit-def $vl, implicit-def $vtype We would try to move the vn1 def VNInfo up to the previous VSETVLI, in the middle of vn0's segment. However separately, we were also assuming that the vl would only have one definition and thus were just taking the VNInfo from beginIndex(), so we ended up with a backwards segment and got the error "Cannot create empty or backwards segment". This fixes these two issues, the first one by moving the AVL operand + live interval up first, and the second by taking the VNInfo from NextMI's slot index. Fixes #141907