llvm-project

a4dbd111 - [LLVM][CodeGen][AArch64] Fix global-isel for LD1R. (#164418)

[LLVM][CodeGen][AArch64] Fix global-isel for LD1R. (#164418) LD1Rv8b only supports a base register but the DAG is matched using am_indexed8 with the offset it finds silently dropped. I've also fixed a couple of immediate operands types inconsistencies that don't manifest as bugs because their incorrect scaling is overriden by the complex pattern and MachineInstr that are correct and thus there's nothing to test.