llvm-project

a61830a1 - [AArch64][ISel] Improve lowering for clmul v4i32 with AES (#204542)

[AArch64][ISel] Improve lowering for clmul v4i32 with AES (#204542) Lower CLMUL v4i32 by splitting it into two v2i32 operations and concatenating the results when AES is available. This avoids the much larger generic expansion and lets v4i16 benefit via legalization through v4i32. Update the cost model: v4i32 is costed as the 11-instruction PMULL sequence, and v4i16 as that sequence plus the required input widens and result narrow.