llvm-project
a774adb0 - Bulk port 64-bit x86 builtins to TableGen (#121043)

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269 days ago
Bulk port 64-bit x86 builtins to TableGen (#121043) This PR follows https://github.com/llvm/llvm-project/pull/120831 for x86-64. Similar to that PR, this does a very mechanical port of X86 builtins to TableGen. There is a *lot* of improvement available here to use TableGen more effectively and collapse repeated structures. But those can now be follow-up PRs that restructure *within* the `.td` file. The current structure produces a file that exactly matches the original X-macros except for the differences outlined in https://github.com/llvm/llvm-project/pull/120831: - Horizontal whitespace - `long long` types now use `long long` outside of OpenCL, but switch to `long` in OpenCL where relevant. Otherwise, only the order of builtins change, and no tests regress.
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