llvm-project

aedf92c5 - [AMDGPU] Introduce TransCoexecutionHazard target feature (#204412)

[AMDGPU] Introduce TransCoexecutionHazard target feature (#204412) TransCoexecutionHazard implies there is data hazard between TRANS and the following VALU instruction when they are co-executed. Currently gfx1250 and gfx1251 have this target feature.