llvm-project

b5be6599 - [CIR][AArch64] Add missing lowerings for vceqz_* Neon builtins (#184893)

[CIR][AArch64] Add missing lowerings for vceqz_* Neon builtins (#184893) Implement the remaining CIR lowerings for the AdvSIMD (Neon) `vceqz{|q|d|s}_*` intrinsic group (bitwise equal to zero). The `vceqzd_s64` variant was already supported; this patch completes the rest of the group [1]. Tests for these intrinsics are moved from: * test/CodeGen/AArch64/neon-misc.c to: * test/CodeGen/AArch64/neon/intrinsics.c The implementation largely mirrors the existing lowering in CodeGen/TargetBuiltins/ARM.cpp. `emitCommonNeonBuiltinExpr` is introduced to support these lowerings. `getNeonType` is moved without functional changes. Reference: [1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#bitwise-equal-to-zero