llvm-project
bae8e1f9 - [MLIR][DRR] Fix inconsistent operand and arg index usage (#139816)

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134 days ago
[MLIR][DRR] Fix inconsistent operand and arg index usage (#139816) Background issue: #139813 In [emitEitherOperandMatch()](https://github.com/llvm/llvm-project/blob/e62fc14a5d214f801758b35bdcad0c8efc65e8b8/mlir/tools/mlir-tblgen/RewriterGen.cpp#L774) we check if `op.getArg(argIndex)` is a `NamedTypeConstraint`: ```cpp } else if (isa<NamedTypeConstraint *>(op.getArg(argIndex))) { emitOperandMatch(tree, opName, /*operandName=*/formatv("v{0}", i).str(), operandIndex, /*operandMatcher=*/eitherArgTree.getArgAsLeaf(i), /*argName=*/eitherArgTree.getArgName(i), argIndex, /*variadicSubIndex=*/std::nullopt); ++operandIndex; } ``` but in `emitOperandMatch()` we cast on `op.getArg(operandIndex)`, which is incorrect if the operation has attributes or other non-operand arguments before its operands.
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