llvm-project
bc057a38 - [LLVM][CodeGen][AArch64] Improve generated code for SVE VLS truncates. (#190778)

Commit
13 days ago
[LLVM][CodeGen][AArch64] Improve generated code for SVE VLS truncates. (#190778) When SVE VLS is enabled we request custom lowering for all ISD::TRUNCATE operations involving legal types. However, we only custom lower all of them when NEON is not available and so there are variants that do not require SVE and can be done via NEON but we are instead falling back to default expansion, which is this case means scalarisation. This patch updates custom lowering to mark the variants that have isel patterns available.
Parents
Loading