llvm-project
c7165587 - [mlir][affine|ValueBounds] Add transform to simplify affine min max ops with ValueBoundsOpInterface (#145068)

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171 days ago
[mlir][affine|ValueBounds] Add transform to simplify affine min max ops with ValueBoundsOpInterface (#145068) This commit makes the following changes: - Expose `map` and `mapOperands` in `ValueBoundsConstraintSet::Variable`, so that the class can be used by subclasses of `ValueBoundsConstraintSet`. Otherwise subclasses cannot access those members. - Add `ValueBoundsConstraintSet::strongCompare`. This method is similar to `ValueBoundsConstraintSet::compare` except that it returns false when the inverse comparison holds, and `llvm::failure()` if neither the relation nor its inverse relation could be proven. - Add `simplifyAffineMinOp`, `simplifyAffineMaxOp`, and `simplifyAffineMinMaxOps` to simplify those operations using `ValueBoundsConstraintSet`. - Adds the `SimplifyMinMaxAffineOpsOp` transform op that uses `simplifyAffineMinMaxOps`. - Add the `test.value_with_bounds` op to test unknown values with a min max range using `ValueBoundsOpInterface`. - Adds tests verifying the transform. Example: ```mlir func.func @overlapping_constraints() -> (index, index) { %0 = test.value_with_bounds {min = 0 : index, max = 192 : index} %1 = test.value_with_bounds {min = 128 : index, max = 384 : index} %2 = test.value_with_bounds {min = 256 : index, max = 512 : index} %r0 = affine.min affine_map<()[s0, s1, s2] -> (s0, s1, s2)>()[%0, %1, %2] %r1 = affine.max affine_map<()[s0, s1, s2] -> (s0, s1, s2)>()[%0, %1, %2] return %r0, %r1 : index, index } // Result of applying `simplifyAffineMinMaxOps` to `func.func` #map1 = affine_map<()[s0, s1] -> (s1, s0)> func.func @overlapping_constraints() -> (index, index) { %0 = test.value_with_bounds {max = 192 : index, min = 0 : index} %1 = test.value_with_bounds {max = 384 : index, min = 128 : index} %2 = test.value_with_bounds {max = 512 : index, min = 256 : index} %3 = affine.min #map1()[%0, %1] %4 = affine.max #map1()[%1, %2] return %3, %4 : index, index } ``` --------- Co-authored-by: Nicolas Vasilache <Nico.Vasilache@amd.com>
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