llvm-project

c7c340b4 - [AMDGPU][CodeGen] Implement SimplifyDemandedBitsForTargetNode for readlane, wwm and set.inactive intrinsics. (#190830)

[AMDGPU][CodeGen] Implement SimplifyDemandedBitsForTargetNode for readlane, wwm and set.inactive intrinsics. (#190830) Propagate demanded bits through readlane, wwm, set.inactive intrinsics in AMDGPUISelLowering in SimplifyDemandedBitsForTargetNode. This allows upstream zero/sign extensions to be eliminated when only a subset of bits is used after intrinsics. Partially addresses https://github.com/llvm/llvm-project/issues/128390.