llvm-project

cbb9b0e0 - [AArch64] Lower v1i64 and v2i64 [S|U][MIN|MAX] to SVE when available (#166735)

[AArch64] Lower v1i64 and v2i64 [S|U][MIN|MAX] to SVE when available (#166735) The predicate is likely to be hoisted, so in a loop, this would result in a single SVE instruction, which should have lower latency.